The OUM is a type of electrically-alterable non-volatile semiconductor memory device that has emerged in the last few years. This memory device exploits the properties of so called “phase-change” materials that can be reversibly switched between two phases, namely a generally amorphous, disordered phase and a generally crystalline, highly ordered phase.
A phase-change material exhibits different electrical characteristics, particularly a different resistivity, peculiar to each one of the two phases; in particular, when the phase-change material is in the amorphous phase, it exhibits a relatively high resistivity, whereas when the material is in the crystalline phase, it has a relatively low resistivity. Thus, each material phase can be conventionally associated with a corresponding one of the two logic binary values, “1” and “0”. An example of a phase-change semiconductor memory is described in U.S. Pat. No. 5,166,758, which is incorporated by reference.
Typically, the memory device includes a matrix of phase-change memory cells, arranged in rows and columns with associated word lines and bit lines, respectively. Each memory cell consists of a storage element connected in series to an access element, for example the base-emitter junction of a Bipolar Junction Transistor (BJT), particularly a PNP BJT, associated with the storage element.
The storage elements are made of a phase-change material, typically a calcogenide (e.g., a Ge2Sb2Te5 alloy); if the programmable storage element is in the amorphous phase, the memory cell is conventionally considered to be in a “reset” status, and this status is associated with a first logic binary value, typically the “0”; if the programmable storage element is in the crystalline phase, the memory cell is conventionally considered to be in a “set” status, which is associated with the opposite logic binary value, in the example the “1”.
Without entering into particulars, which are per-se well known to those skilled-in the art, the phase of the phase-change material is stable below a predefined temperature (a typical temperature value is 150° C.). The material phase can be changed by heating the material over such a temperature; for this purpose, a voltage higher than a corresponding phase-change voltage value (for example, 0.6V) is applied to the memory cell's storage element; the applied voltage causes the flow of a current through a resistive element placed in contact with the phase-change material of the programmable storage element, which resistive element acts as a local Joule-effect heater, and accordingly raises the temperature of the phase-change material. Depending on the voltage applied thereacross, and thus on the current flowing therethrough, if the programmable storage element is heated over a so-called “nucleation temperature” (typically, 200° C.) and then cooled down slowly, the phase-change material becomes crystalline; conversely, if the programmable storage element is heated over a higher, so-called “melting temperature” (such as 600° C.) and then cooled down rapidly, the phase-change material becomes amorphous.
OUMs are thus intrinsically sensitive to high temperatures: if, after a memory cell has been brought to the reset status (shortly, it has been reset), it is exposed to a high temperature for a sufficient time, it may happen that the memory cell switches to the set status (i.e., the memory cell is set), with the consequence that the information previously stored therein is lost. Thus, any operation on the memory IC that involves the exposure thereof to relatively high temperatures (e.g., temperatures approaching 150° C.) is at least potentially dangerous, because it may cause a partial or even total loss of the stored data.
It has been observed that a problem arises when, for the correct operation of the memory device, a preliminary device initialization procedure is required, which typically means properly configuring selected storage elements, e.g. some memory cells of the memory device.
Typically, the device initialization procedure may consist in one or more steps that are performed at the first power up of the memory device. The first power up of the memory device usually takes place during the post-manufacturing test phase (so-called EWS, acronym for Electrical Wafer Sorting) in which the device initialization procedure is necessary for the correct operation of the memory device under testing.
For example, during the EWS, defects in the memory device are identified. Manufacturing processes of integrated circuits are inherently affected by defectiveness, especially in the early stages of a newly-developed manufacturing technology. Semiconductor memories, being characterized by a very large integration scale, are greatly affected by manufacturing defects. Within a semiconductor memory, defects in the memory cell matrix are highly probable; unfortunately, a defect that impairs the functionality of even a single memory cell may cause the whole memory device to be discarded, with a consequent significant reduction of the process yield, and an increase of costs. For this reason, redundant word lines or bit lines of memory cells (structurally identical to the normal memory cells that would be strictly necessary for achieving the desired storage capacity, and provided in the memory matrix in addition thereto) are normally provided in the memory device, for functionally replacing a defective word line or bit line.
Thus, in order to fully test the memory device, it may be necessary to functionally replace defective memory cells (or entire defective word lines, or bit lines) with redundancy ones, and this may involve storing information concerning, for example, the defective cells' addresses.
As another example, during the EWS, it may be necessary to set trimmerable circuit structures, like voltage/current generators, partitioners and the like, and this as well may involve storing in the memory IC a selected trimming configuration.
All this initialization data, and other, may have to be stored in OUM cells. A typical case in which initialization data are to be stored in OUM cells is the programming of OUM cells to be used as reference voltage/current generators for, e.g., reading the other memory cells during the normal memory device operation.
After the EWS phase, the wafer is separated into dies, and the dies are packaged; the packaged dies are then assembled on PCBs (acronym for Printed Circuit Boards). Both these operations involve very high temperatures, well above the temperature ensuring phase stability of the phase-change material; such high temperatures may cause the OUM memory cells to switch from the reset status to the set status, loosing the information previously stored.
In particular, initialization data that had been stored in OUM cells during the EWS may be lost. This may be critical, for example because at the successive power-up of the memory device (usually, taking place on field when the memory has already been incorporated in a user's electronic system), the memory device circuit structures will not be properly initialized, and thus they will not operate correctly and the user may even not be aware of this, expecting instead that everything goes right.
It has also been observed that similar problems are incurred in other types of semiconductor memory devices, whenever the memory cells are sensitive to temperatures, such as for example in ferroelectric memories.